1. Field of the Invention
This invention relates to semiconductor structures having a compound semiconductor-insulator interface and a method for passivating compound semiconductor surfaces prior to deposition of an insulating material.
2. Description of the Prior Art
Recently, there has been extensive technological research in the area of growing insulating materials such as oxides and nitrides onto compound semiconductor substrates such as GaAs. The driving force behind this research is to realize MOS devices on III-V compound semiconductor substrates. Heretofor, attempts to fabricate MOS structures on GaAs have been unsuccessful due to the very high density of interface states which are nearly always present on exposed GaAs surfaces or at interfaces with virtually all materials. The presence of the high density of interface states causes the pinning of the GaAs interface Fermi level.
In the fabrication of MOS structures on III-V substrates, the surface Fermi level should be unpinned to allow the Fermi level to be varied by bias voltages applied to the gate electrode. The movement of the Fermi level permits the device to be operated in an inversion mode or an accumulation mode, depending on the polarity of the bias applied to the gate.
Previous attempts to deposit insulators onto compound semiconductor substrate surfaces have been largely unsuccessful due to the insulator-substrate interface defects. For example, the GaAs surface is composed of two oxides, As.sub.2 O.sub.3 and Ga.sub.2 O.sub.3. The As.sub.2 O.sub.3 is of poor quality and can act metallic. The Ga.sub.2 O.sub.3 is a high quality oxide that is stable up to 500.degree. C. These surface oxides are approximately 20 to 30 angstroms thick. The GaAs surface presents problems because of the poor thermal stability of As.sub.2 O.sub.3 and because free arsenic is present on the GaAs surface.
Prior attempts have been made passivate the compound semiconductor surface prior to deposition of an insulating material. U.S. Pat. No. 4,645,683 teaches treating a GaAs substrate in a hydrogen and arsine multipolar plasma to remove the oxides. The substrate is then treated in a nitrogen multipolar plasma to provide a protective layer of gallium nitride and arsenic nitride. Silicon nitride is then deposited onto the protective layer. Attempts to improve this process have included an initial chemical cleaning in a solution of hydrochloric acid to reduce the oxide thickness prior to the plasma treatments, as shown by Friedel, et al, "Photoemission Study of the Passivation of GaAs in a Nitrogen Multipolar Plasma." Philosophical Magazine, Vol. 55, pp. 711-719, 1987. Friedel, et al. recognize that a very high density of interface states still exists precluding MOSFET applications.